Energy-proportional scheduling generally aims at improving the proportionality of energy consumption according to a resource usage that can improve the overall performance. It has been applied to the CPU through server consolidation, networks through link speed scaling, and hard disk drives through disk speed scaling. To minimize energy consumption, voltage and frequency are often managed at runtime using control loops. Several runtime controllers typically have a similar behavior: the program is observed for a short duration and, based on this observation, a new voltage and frequency setting is chosen for the upcoming phases. Frequently, the program instrumentation is based on hardware counters. Such runtime mechanisms allow flexibility and have been reported to provide significant energy savings in various contexts. For example, the default dynamic voltage frequency selection or scaling (DVFS) control performed in Linux™ operating system exploits a similar runtime strategy. However, runtime DVFS controllers are generally unstable and non-deterministic by nature.
As an alternate solution, voltage and frequency can be controlled at compilation time. In that case, the energy consumption of the various configurations may be predicted. According to one representative approach, the optimal DVFS setting is determined by solving a mixed integer linear programming (MILP) formulation of the selection problem at compilation time. Another similar approach is based on linear programming. The energy models used in these techniques are based on parameters modeling the performance of the programs being compiled. These approaches generally assume that a preliminary profiling of the program being compiled has been performed over a set of relevant input data sets. Such profiling can be impractical if not infeasible in typical production environments however, because often it greatly increases the compilation time and generally requires representative datasets and the target hardware to be available at compilation time.
Concurrency throttling is also a common optimization applied to improve the energy efficiency of programs. However, similarly to DVFS, a runtime approach is often chosen, sometimes combined with DVFS. Runtime mechanisms generally imply instabilities and nondeterminism, which are often undesirable. Some compile-time approaches to concurrency throttling have been suggested. Similarly to DVFS, however, compilation-time approaches to concurrency throttling also generally exploit profiling runs to determine the optimal concurrency and, as such, may be difficult to implement in practice.
A co-pending U.S. patent application Ser. No. 14/699,876, entitled, “Systems and Methods for Power Optimization of Processors,” describes systems and methods to control processor Voltage and Frequency Scaling (VFS), depending on the memory activity in code sections, called instruction windows. In general, the instruction windows are qualified as memory intense or compute intense depending on the operations they performed. Then, a low voltage and frequency may be set before memory-intense windows while a high voltage and frequency can be set before entering compute-intense windows. Such strategy can achieve energy saving because the processor does not need to run at full speed when it waits for data from memory.
In order to increase the benefits of VFS and to thereby increase energy savings, instruction windows must obey to some rules. In particular, the instruction window must be large enough to amortize the cost of switching the voltage and frequency. Moreover, it is highly desirable that the instructions within a window have a similar memory intensity, in order to benefit from the chosen frequency.